Terminologies for electric circuits:
Also note that in a circuit diagram, the direction of a current and the polarity of a voltage source can be assumed arbitrarily. To determined the actual direction and polarity, the sign of the values also should be considered. For example, a current labeled in left-to-right direction with a negative value is actually flowing right-to-left.
Kirchhoff's Laws
Based on the principle of conservation of electric charge, the Kirchoff current Law (KCL) states that:
The algebraic sum of the currents into a node at any instant is zero.
Based on the principle of conservation of energy, the Kirchoff voltage Law (KVL) states that:
The algebraic sum of the voltages around a loop at any instant is zero.
Assume currents going into the node are positive and those leaving the
node negative, KCL states:
.
Assume the current goes around a clockwise loop, KVL states:
; alternatively, if assume the current goes around a
counter clockwise loop, we have
;
Example: Given circuit below, find
,
,
,
and
.
According to Ohm's law, we have
.
Apply KVL to the loop on the right to get:
According to Ohm's law, we have
.
Apply KCL to the middle node on top to get:
Again by Ohm's law, we get
.
Apply KVL to the loop on the left to get:
Voltage Divider:
According to Ohm's law, the voltage
across the kth resistor
can be
found to be:
Resistors in series: According to KVL, the sum of voltages across
the resistors is equal to the input voltage:
Resistors in parallel: According to KCL, the sum of currents through
the resistors is equal to the input current:
Current Divider:
According to Ohm's law, the current
through the kth resistor
can be
found to be:
Inductors in series: According to KVL, the sum of voltages across
the inductors is equal to the input voltage:
Inductors in parallel: According to KCL, the sum of currents through
the inductors is equal to the input current:
Capacitors in series: According to KVL, the sum of voltages across
the capacitors is equal to the input voltage:
| Resistor | Inductor | Capacitor | |
| Governing Equation |
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| Series connection |
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| Parallel connection |
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