An MUX has N inputs and one output. Under the control of
*selection* signals, one of the inputs is passed on to the output.

First consider the truth table of a 2x1 MUX with three inputs , and
and only one output :

This truth table can be simplified by allowing Don't-cares in the table:

Finally, if we allow variables in the truth table (variable-entered map VEM), the truth table can be further simplified to be

A 4x1 MUX has inputs , , and , and
selections and . Its output is one of the four inputs depending
on the selections. The truth table for a 4x1 MUX:

This truth table can be simplified by the VEM:

We see that each minterm of the two selection bits corresponds to an input:

where is the ith minterm of .

This approach can be generalized to any MUX of inputs with selections.

**Note:** The AND gates used here can be conceptively considered as guarded
gates. To see this, consider an AND function :

Only when both signals and are 1, will the output be the same as input signal . In other words, only when both ``guards'' and agree, can the signal go through the gate.